The QRC ACIA Interface Board is a 5 1/4" by 3 1/2" double sided board for the SS-30 bus. It can be build for single or dual ACIA in one slot. These boards were manufactured by Quality Research Company of Spokane Washington in the early 1980s
Wired for single ACIA (JPG 70k)
This schematic shows a dual ACIA version with CTS and RTS. The SWTPC 6800 SWTBUG ROM monitor will not work with a dual ACIA in I/O slot number one. SWTBUG writes to location $8004 then reads $8006. If the data is the same it is a MP-S (ACIA) interface. If the data is different it must be a MP-C (PIA) interface. If you need a dual ACIA in slot 1 you can modify SWTBUG or steal the I/O select from an unused slot.
Schematic (JPG 198k)
Wiring Diagram (JPG 115k)
Assembly Instructions (PDF 660k)
While most of the connections are made with PCB traces, the output was unwired to allow for a vairity of configurations. Many connections have the most common configuration as a trace between two holes. For example, the rarely used DCD pin of the MC6850 is brought to the User Tie Point area and connected to ground. To change the connection you just have to cut the trace and wire it as needed.
User Tie Points (JPG 167k)
Bottom of Bare Board (JPG 200k)
Top of Bare Board (JPG 200k)
Parts List (PDF 5k)
Part List (XLS 18K)
Photo of Parts for Single ACIA (JPG 51k)
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